As one of the first quantum platforms to start to significantly scale-up, superconducting qubit platforms have been first to face a series of control plane challenges. These are complicated by the need to work down to extreme cryogenic temperatures.
Pioneers face challenges across cryogenics, control electronics and control software.
The first challenge for many quantum pioneers has been working at extreme cryogenic temperatures. Getting down to 20mK (and in some cases lower) requires the use of a dilution refridgerator.
Bluefors has been an early leader in dilution refrigeration for the quantum sector. Its new high capacity XLD fridges support a high-density wiring solution for >1000 coaxial lines. Oxford Instruments is another long standing player in cryogenics. It’s notably involved in the EU Flagship QMiCS project that seeks to address the key requirement for quantum coherent interconnects between neighboring dilution fridge units. Opportunities and diversity wihtin the quantum cryogenics sector is set to expand as other qubit technologies explore the possibility of operations in the more forgiving 1-4K regime.
Getting control wires in and out through the multiple cooling stages of these devices is a key challenge. Compact control solutions such as Zurich Instrument’s QCCS route all the required control connections back out to room temperature. Accompanying software orchestrates qubit manipulations. This design approach supports rapid prototyping as well as pioneering projects such as OpenSuperQ’s plan for a 100Q device by end-2021. Zurich Instruments is certainly committed to scaling up to support systems beyond 100Q. Origin Quantum AIO provides high quality pulse generation and real-time control and scheduling.
In the end, with future scaling considerations in mind, many think it will be desirable to locate control closer to the quantum hardware itself. However conventional CMOS devices don’t operate well at such low temperatures. Majors, such as Google and Intel have been developing cryo-CMOS control hardware located at an intermediate 3K stage; Microsoft at the 20mK stage itself . Supporting fast processing and feedback for quantum error correction while dissipating unwanted heat is a key challenge.
Seeqc, a recent spinout from superconducting electronics leader Hypres, promises to significantly shake-up this segment of the industry. It bases its approach on SFQ rather than cryo-CMOS technology. This technology is based on the use of single flux quantum (SFQ) picosecond pulses. It is native to the cryogenic regime and uses the same Josephson junction based circuits as superconducting qubits. The promised benefits include orders of magnitude less heating, ultrafast clock speeds and low latency. Seeqc plans to develop a hybrid application specific quantum computer with SFQ readout and control plane solutions at 20mK and an associated classical SFQ co-processor at 3K.
Characterising, calibrating and optimising qubit operations is a key challenge. At this boundary of software, firmware and hardware, some interesting quantum startups have been quick off the mark.
Q-CTRL specialises in improving hardware performance by quantum control engineering (analogous to classical optimal control techniques in aeronautics and autonomous vehicles). They offer tools that allow a user to characterise the underlying qubit hardware and to optimise the RF pulses used to drive gates. For instance, in performing a single-qubit gate to get from A to B on the Bloch sphere the qubit has to be driven along a specific path. The exact path taken affects how susceptible it is to noise along the way and how errors accumulate. This know-how is offered as part of the BOULDER OPAL toolkit for R&D professionals and web-based BLACK OPAL (offering some brilliant visualisations) aimed at newcomers and students in quantum computing.
Quantum Benchmark seek to accelerate the design cycle across qubit operations overall. Their True-Q software offers a broad range of tools for error characterisation and run-time error suppression. Their randomised benchmarking and randomised compiling techniques have become de facto standards across the sector. Their more advanced cycle benchmarking technique looks at how gates in one part of a device inadvertently affect other ‘spectator’ qubits. A detailed understanding of this for a particular device is not just a vital diagnostic , it enables an error adaptive compiling step to add additional correcting qubit operations so improving practical device fidelity.
These control techniques offer the additional promise that they can also be applied across a variety of qubit technologies.